checkedsmul instruction

Group: bits

Additional groups: checked_arithmetic, arithmetic

checkedsmul — perform checked multiplication of two bits values treating them as signed integers

Syntax

R(name) means that the operand named name must be a register address. 48 bits wide.
Ri(name) means that the operand named name must be a register index (used only by frame instruction). 40 bits wide.
V(name) means that the operand named name must be a value access. 48 bits wide.
V(name:type) means that the operand named name must be a value access evaluating to a value of type. 48 bits wide.
L(type) means that the operand must be a literal of type. Variable width, at least 8 bits.
Fn means that the operand must be a name of a function. Variable width, at least 24 bits.
Cl means that the operand must be a name of a closure. Variable width, at least 24 bits.
Ca means that the operand must be a name of a callable (function or a closure). Variable width, at least 24 bits.
Bl means that the operand must be a name of a block. Variable width, at least 16 bits.
Ma means that the operand must be an instruction marker or an instruction index (used only by jump and if instructions). 64 bits wide.
void means that the operand must be void. 8 bits wide.

  1. checkedsmul R(result) V(lhs) V(rhs)

samples:

Encoding

The instruction is encoded on 152 bits (19 bytes).

ERROR: FATAL: Invalid field_list specification (Opcode:8,Ot_address:8,Register_set:8,Index:32,Ot_access:8,Register_set:8,Index:32(lhs),Ot_access:8,Register_set:8,Index:32(rhs))

Viua VM | docs